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High Speed PCB Design Guidelines

July 26, 2019

Anna Petrova

Marketing Manager

High Speed PCB design can be tricky. We decided to summarize the most important rules you should follow to make your high speed PCB reliable and efficient. Also, we have added our own tips and tricks which can help you.

Introduction. Why we decided to write this article?

The world is permanently changing and everything tends to be more efficient. To move with the times, devices should meet the demands of their proactive users, living at high speed. To satisfy customers’ needs, manufacturers try to make their products as user-friendly as possible: the size of the devices is getting smaller, data transfer is getting faster and devices themselves are becoming more functional and handy. 

But what does it all start with? Any device starts with PCB design. And any up-to-date and high speed device starts with high speed PCB design. All high-tech devices are designed with a high speed PCB and such a design is definitely going to prevail in the future. That is why every PCB designer should not only be aware of it but take a shot and design a high speed PCB in order to acquire the necessary skills and experience thus uplevelling oneself and staying a go-to engineer. 

Our team has had such experience performing on high speed PCB design projects. So, we decided to write this article not only to underscore the relevance of its topic but also to share our personal experience and give first-hand recommendations which could be helpful to designers who make their first steps in exploring the area of high speed PCB design.


What is high speed PCB design? How to identify it

First of all, let us clarify what high speed PCB design is. To make it simple, please find below a list of characteristic features and if you can tick at least one of them, then you encounter what we are actually discussing in this article.

  • high speed interfaces such as HDMI, Ethernet, SATA, PCI Express, USB, Thunderbolt, etc. are used for the fast data transfer
  • the circuit consists of several sub-circuits connected to each other through high speed interfaces (LVDS, DSI, CSI, SDIO, DDR3, etc.)
  • signal propagation time over the track is at least ⅓ of the signal rise time
  • the digital signal frequency is of 50MHz and over
  • the size of the printed circuit board is really small and the location of the components becomes a real challenge especially when you come across a high speed interface layout

To sum up, high speed PCB design is applied to devices with PCBs working at high frequencies with the use of high speed interfaces where the amount of data and speed of its transfer mean the world.

DDR3 interface layout

DDR3 interface layout

This picture illustrates a part of high speed PCB design which was developed for a home automation system project. Our team managed to meet all the challenges and achieved great results in the development of a tablet-style smart home head unit

High speed PCB design rules and the main challenges confronting a high speed PCB designer

As in every engineering process, there are certain rules and directions on how to design a high speed PCB. Let us consider the key points and challenges which may arise at the same time.

Trace length tuning 
When you use a high speed interface, you need to tune the length of the traces to synchronize signal propagation through data lines. In case where it is not synchronized, the interface could fail at the maximum frequency or will not work at all. The higher the frequency of the interface is, the higher the length matching requirements are. In case of a parallel interface, just the lengths of all traces should be tuned. The main challenge is that there are many traces with a lack of space for length tuning. In case of a serial interface, signals are united into several differential pairs. 
Length matching rules for differential pairs are more complicated. Apart from the fact that all traces should have the same length with a tolerance of X mm, the length of traces should be equal in each pair with a tolerance of Y mm given that Y < X. Aligning of the traces` lengths leads to the loss of the distance equality between the tracks of a differential pair and one should pay attention that the length of such equality-loss regions is not more than the maximum uncoupled length. For extremely high speed interfaces it is also important to remember the interconnecting delays inside CPUs, FPGAs and so on - these delays should be taken into account during the tracks length tuning.

Modern CADs have built-in tools for trace length tuning. But before using such tools it is necessary to define aligning rules for each of the interfaces, that is why a developer should know which rules and limitations exactly are to be defined. 

Aligning rules for differential pairs layout

Aligning rules for differential pairs layout (Altium Designer)

Tuned length of tracks

Tuned length of tracks

Tuned differential pair

Tuned differential pair

Tuned parallel interface

Tuned parallel interface

Impedance 
During a PCB layout as well as a high speed PCB layout both single-ended impedance Zo (i.e. impedance of single tracks which are not united into differential pairs), and differential impedance Zdiff (i.e. impedance between a pair of coupled tracks) should be observed. There are typical values of impedance for each interface both parallel and serial. 

There are also other types of impedance - Odd Mode Zoo (half the value of the differential impedance), Common Zcm (into a pair of lines with identical signals) and Even mode Zoe (twice the common mode value). These impedances are considered quite rare, nevertheless one shouldn`t forget about them either. The wrong single-ended or differential impedance will lead to the signal reflections inside the track and as a result loss of signal quality, working frequency decrease and generation of unwanted EMI, that is why adherence of the right impedances is one of the most important rules of the high speed PCB design.

Parameters for Zdiff calculation

Parameters for Zdiff calculation

Track shape
Straight tracks from the sources to the receiver are very rarely met on boards. This is especially true for the tracks of high speed interfaces which are deliberately bent during the lengths` tuning. Ideally, tracks are to be bent with the help of rounded, smooth corners without sharp bends. However, this approach would require a lot of time for the design. Especially given that each track is redrawn several times during the layout optimization. The worst case is to bend tracks at 90-degree angles because a track`s width changes dramatically at the bends which leads both to the change of impedance in these places and the appearance of reflections in the track. In the case of differential pairs, this also leads to a higher value of uncoupled length. For this reason, the best option is to bend tracks at an angle of 45 degrees. 

Tracks bent at 45 degrees

Tracks bent at 45 degrees

Termination
The most common type of termination today is parallel termination. The idea is to place a resistor between the tracks of a differential pair at the end of the line, as close to the receiver as possible. Termination makes it possible to effectively get rid of signal reflections in the tracks, therefore, upgrading the quality of data transfer. In the case of differential pairs, resistor value should be equal or a little more than Zdiff. The low value of the resistor will cause over-termination which will adversely impact the signal quality. Some ICs have termination resistors inside, in this case, external resistors are not needed, they will cause over-termination - that’s why it is important to learn datasheets and hardware design guides for all used ICs.

Termination resistor for a differential pair

Termination resistor for a differential pair

Grounding 
In most cases, high speed interfaces cannot be traced on one layer, so traces need to be moved to the other layers with the help of vias. It is necessary to place GND vias as close to signal vias as possible so that the GND polygons potential close to the signal vias could be the same on different layers. Such GND vias are called stitching vias. This approach allows keeping the same GND reference all along the high speed trace.

Stitching vias near the signal vias

Stitching vias near the signal vias

Components location 
Talking about the placement of components which are connected to each other by high speed interfaces, it is important to bear in mind that the tracks` length is not too long and there should be enough space for the length tuning. There is no point in placing such components in close proximity to the interference sources, such as switching power converters. Сomponents relating to high speed interfaces should not be placed too close to the edge of the board either, because the placement of the tracks at the edge has a negative impact on the signal quality. 
The components location becomes a real challenge when a PCB is of a very small size. Following the location rules for high speed design we placed the components in the most accurate manner on a small PCB for a custom IP camera.

Mutual location of CPU and DDR3 memory chip

Mutual location of CPU and DDR3 memory chip. ICs connected to each other through a high speed interface are placed in a way which firstly allows having enough space for the length tuning and secondly ICs are not placed too far from each other (interface tracks are not too long).

Placement of ground polygons on the layers close to the signal layers
Tracks of high speed interfaces should be routed over a solid GND plane. It is not advisable to route tracks over cutouts in polygons or over polygon-splits since it will cause: extra EMI, signal propagation delays, integrity violation, interference generation and ultimately, degradation of the signal quality. Nonetheless, if the tracks happen to cross polygon-splits, to minimize the negative impact on the signal, it is necessary to place ceramic stitching capacitors at the place of polygons splitting.

DDR3 interface routing above a solid GND polygon

DDR3 interface routing above a solid GND polygon

Crosstalk
Crosstalk is a phenomenon which takes place when a signal transmitted over one communication track raises an unwanted effect (change in signal) in other tracks and in most cases, these are neighboring tracks. The longer the section`s length where the tracks run parallel with each other, the higher crosstalk is. To minimize crosstalk, it is necessary to make the distance between the tracks at least three times longer than the track`s width (3W rule). In order to minimize crosstalk between differential pairs, the distance between the differential pairs should be at least five times longer than the track`s width (5W rule). The same distance should be kept between differential pairs and any other tracks along the full length of the differential pair. If a differential pair serves to transmit a periodic signal, e.g. clocking, it is recommended that the designer increase the distance from this differential pair to the other differential pairs or any other tracks up to 8-10W.

Special attention should be paid to the tracks of asynchronous signals (enable, interrupt, reset, etc.) The distance between these tracks and tracks with high speed signals should be made as long as possible. If two neighboring layers in a multilayer printed circuit board are used for routing signals, the tracks should be routed on one layer perpendicular to the tracks on the second layer. This will help avoid parallelism of tracks thus minimizing crosstalk between them.

3W distance between parallel tracks

3W distance between parallel tracks

Of course, not all the high speed PCB design rules are mentioned here since it is a wide area of an even much wider area called PCB design. PCB design is a part of such a vast domain of embedded hardware development which includes, for instance, preparations for production and selection of components where myriads of nuances should be taken into account such as the device production time and the planned term of components discontinuation, etc. We can take care of all the details delivering your project as part of embedded hardware design and development services which we provide.

Tips for high speed PCB design based on the first-hand experience

As a team of developers who have sufficient experience in high speed PCB design, we would like to give first-hand recommendations that can be helpful for newcomers to streamline their workflow.

As we pointed out in the previous section of this article, tuning of traces` length is a crucial aspect in high speed design. The main problem is that built-in tools of modern CADs allow for controlling of just the overall length of traces. However, if the tracks of a high speed interface pass on several layers, both the overall length of the traces and sections of the tracks on each layer should be aligned. The reason for this is that signal propagation time is different on different layers. To control the section lengths, it is easy to use an excel or google spreadsheet where you add the lengths of the track sections located on different layers. Although the data has to be added manually, this approach allows for trace length tuning with the required accuracy.

Another important aspect which was mentioned above is an impedance issue. Our strong recommendation, or even a must-do, here is to ask your manufacturer about their PCB stacks and parameters of tracks for getting the required impedance on different layers. This is really essential because calculated values can differ from the actual impedance. Depending on each manufacturer, there is a slight difference in the characteristics of materials affecting impedance. So, before setting design rules of high speed interfaces on your board, it is necessary to choose a manufacturer and ask them about the stack-up options they have for the number of layers you need as well as the length of the tracks and distance between them to obtain the required single-ended and differential impedance.

Also, to get the required impedance of some tracks on manufactured boards, you should indicate these tracks on the design and ask your manufacturer to perform the impedance control procedure. In case actual impedance differs from the required one, the parameters of the tracks should be changed in the design. Such a procedure will add to the cost of manufacturing, but will allow the designer to increase the quality of high speed signals on the PCB.

It is always very useful to acquire new knowledge and adopt experience from other developers for both newcomers and advanced engineers. Our engineers are no exception - they are constantly trying to replenish their store of knowledge and move with the times. One of the most efficient methods of doing that is to take various courses and training programs. In regards to high speed PCB design, we can recommend Advanced PCB Layout Course by Fedevel Academy
For newcomers, this course can help teach how to start, what to do first, what to do next, how to check every part of the PCB, how to create output documentation and a lot of other information. Experienced engineers will be able to learn a lot of useful tips and tricks which can save plenty of time.


We hope that these tips will come in handy and be used in a number of future high speed design projects. If you need assistance with high speed PCB design or a professional review of the existing design, you are always welcome to contact us with your inquiries. Our experts are ready to share their experience and help you meet your needs for PCB design and layout services.


As you see, high speed design is a challenging but really interesting subject which leaves a lot of space for research and practice.  If you are a PCB designer, you should definitely delve into that subject in order to meet the needs of the age. So, do not slow down, and keep going at high speed!

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